Google Chips Join Meta's AI Infrastructure

Google’s custom AI processors are now running in production at Meta. The tech giant confirmed that its Tensor Processing Units, or TPUs, support Meta’s AI workloads through a new software integration. This marks the first time these chips have been sold to an external customer for large-scale AI tasks. The move signals a major shift in the industry's hardware landscape.

The change comes from a new version of the SGLang inference engine. Previously, running AI on TPUs required using Google’s own JAX framework. The new SGLang-TorchTPU allows the hardware to work natively with PyTorch. This means developers do not need to rewrite their code. A similar update was released for vLLM, another popular inference tool. Both updates are now open source.

Zongwei Zhou, Meta’s lead for PyTorch-TPU, confirmed the deployment is live. He described the effort as a close collaboration between Meta, Google, and the SGLang team. His team operates out of RadixArk, a startup founded by the creators of SGLang. Zhou said the new stack provides Meta with a mature serving environment. Jana van Greunen, a director at Meta, added that the company needs options beyond a single hardware architecture.

This is not Meta’s first try with Google chips. In the past, the company used an older bridge called PyTorch/XLA. Reports from last year indicated that Meta research teams used TPUs from 2020 to 2023 via this method. Those contracts were eventually canceled. Google has been pushing its PyTorch-on-TPU tools largely to accommodate Meta, which preferred to stay with its existing PyTorch ecosystem rather than switch to JAX.

Details on where the chips are physically located remain unclear. However, industry talks last year suggested a plan for Google Cloud rentals in 2026. Meta reportedly signed a multi-year agreement for these services. Purchases of the hardware were also discussed for 2027. The announcement landed just one day after Amazon open-sourced its own PyTorch backend for its chips. Both moves seem designed to reduce reliance on Nvidia’s dominant software ecosystem.

Performance tests show strong results. A tuned setup serving a massive 2.8-trillion-parameter model reached over 700 tokens per second on the latest Ironwood TPU. This outperformed Nvidia’s GB200 chips, which managed 452 tokens per second in a similar test. The speed boost comes from a technique called speculative decoding. For smaller models, the new kernels offer roughly 1.4 to 2 times the throughput of the Nvidia baseline at low batch sizes.

More models will be supported in the coming months. The team is starting with DeepSeek V4.1 Flash and Reflection Beam. They aim to provide same-day support for new open models by the first quarter of 2027. Google, Meta, and RadixArk will share more details at the SGLang Summit in San Francisco on November 12 and 13.